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ASPDAC
2005
ACM
89views Hardware» more  ASPDAC 2005»
15 years 1 months ago
Routing track duplication with fine-grained power-gating for FPGA interconnect power reduction
Power has become an increasingly important design constraint for FPGAs in nanometer technologies, and global interconnects should be the focus of FPGA power reduction as they cons...
Yan Lin, Fei Li, Lei He
ICCAD
2000
IEEE
104views Hardware» more  ICCAD 2000»
15 years 4 months ago
Diagnosis of Interconnect Faults in Cluster-Based FPGA Architectures
— Fault diagnosis has particular importance in the context of field programmable gate arrays (FPGAs) because faults can be avoided by reconfiguration at almost no real cost. Cl...
Ian G. Harris, Russell Tessier
ISVLSI
2006
IEEE
95views VLSI» more  ISVLSI 2006»
15 years 5 months ago
PLAs in Quantum-dot Cellular Automata
Abstract— Research in the fields of physics, chemistry and electronics has demonstrated that Quantum-dot Cellular Automata (QCA) is a viable alternative for nano-scale computing...
Xiaobo Sharon Hu, Michael Crocker, Michael T. Niem...

Lecture Notes
1005views
16 years 12 months ago
Lectures on reconfigurable computing
Driven by recent innovations in Field-Programmable Gate Arrays (FPGAs), reconfigurable computing offers unique ways to accelerate key algorithms. FPGAs offer a programmable logic f...
Sherief Reda
GLVLSI
2008
IEEE
197views VLSI» more  GLVLSI 2008»
14 years 11 months ago
Efficient tree topology for FPGA interconnect network
This paper presents an improved Tree-based architecture that unifies two unidirectional programmable networks: A predictible downward network based on the Butterfly-FatTree topolo...
Zied Marrakchi, Hayder Mrabet, Emna Amouri, Habib ...