118 search results - page 14 / 24 » Design of programmable interconnect for sublithographic prog... |
FPL
2000
Springer
15 years 1 months ago
2000
Springer
Abstract. In this paper we outline a procedure to determine appropriate partitioning of programmable logic and interconnect area to minimize overall device area across a broad rang...
IPPS
2006
IEEE
15 years 3 months ago
2006
IEEE
Reconfigurable computing applications have traditionally had the exclusive use of the field programmable gate array, primarily because the logic densities of the available devices...
59
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DATE
2003
IEEE
15 years 2 months ago
2003
IEEE
In today’s deep-submicron designs, the interconnect delays contribute an increasing part to the overall performance of an implementation. Particularly when targeting field prog...
DAC
2002
ACM
15 years 10 months ago
2002
ACM
A regular circuit structure called a River PLA and its reconfigurable version, Glacier PLA, are presented. River PLAs provide greater regularity than circuits implemented with sta...
104
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EH
2004
IEEE
15 years 1 months ago
2004
IEEE
This work deals with the design of analog circuits for Artificial Neural Networks (ANNs) controllers using an Evolvable Hardware (EHW) platform. ANNs are massively parallel system...