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DATE
2010
IEEE
139views Hardware» more  DATE 2010»
15 years 6 months ago
Pareto efficient design for reconfigurable streaming applications on CPU/FPGAs
We present a Pareto efficient design method for multi-dimensional optimization of run-time reconfigurable streaming applications on CPU/FPGA platforms, which automatically allocate...
Jun Zhu, Ingo Sander, Axel Jantsch
DAC
2003
ACM
16 years 3 months ago
Clock-tree power optimization based on RTL clock-gating
As power consumption of the clock tree in modern VLSI designs tends to dominate, measures must be taken to keep it under control. This paper introduces an approach for reducing cl...
Monica Donno, Alessandro Ivaldi, Luca Benini, Enri...
AAAI
2011
14 years 2 months ago
Optimal Rewards versus Leaf-Evaluation Heuristics in Planning Agents
Planning agents often lack the computational resources needed to build full planning trees for their environments. Agent designers commonly overcome this finite-horizon approxima...
Jonathan Sorg, Satinder P. Singh, Richard L. Lewis
DSD
2010
IEEE
140views Hardware» more  DSD 2010»
15 years 2 months ago
Optimization of Area and Delay at Gate-Level in Multiple Constant Multiplications
—Although many efficient high-level algorithms have been proposed for the realization of Multiple Constant Multiplications (MCM) using the fewest number of addition and subtract...
Levent Aksoy, Eduardo Costa, Paulo F. Flores, Jos&...
115
Voted
ICANNGA
2007
Springer
134views Algorithms» more  ICANNGA 2007»
15 years 4 months ago
Optical Design with Epsilon-Dominated Multi-objective Evolutionary Algorithm
Significant improvement over a patented lens design is achieved using multi-objective evolutionary optimization. A comparison of the results obtained from NSGA2 and ε-MOEA is done...
Shaine Joseph, Hyung W. Kang, Uday K. Chakraborty