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DATE
2005
IEEE
134views Hardware» more  DATE 2005»
16 years 5 hour ago
Assertion-Based Design Exploration of DVS in Network Processor Architectures
With the scaling of technology and higher requirements on performance and functionality, power dissipation is becoming one of the major design considerations in the development of...
Jia Yu, Wei Wu, Xi Chen, Harry Hsieh, Jun Yang 000...
VR
2000
IEEE
174views Virtual Reality» more  VR 2000»
15 years 10 months ago
Optimization-Based Virtual Surface Contact Manipulation at Force Control Rates
Previous interactive works have used springs, heuristics, and dynamics for surface placement applications. We present an analytical technique for kilohertz rate manipulation of CA...
Donald D. Nelson, Elaine Cohen
ICC
2009
IEEE
133views Communications» more  ICC 2009»
16 years 1 months ago
On Quantizer Design for Soft Values in the Multiple-Access Relay Channel
—A network with two sources, one relay, and one destination is considered. Under the assumption of noisy sourcerelay links causing the relay to be unable to decode without error,...
Georg Zeitler, Ralf Koetter, Gerhard Bauch, Jö...
FPGA
2008
ACM
163views FPGA» more  FPGA 2008»
15 years 8 months ago
TORCH: a design tool for routing channel segmentation in FPGAs
A design tool for routing channel segmentation in islandstyle FPGAs is presented. Given the FPGA architecture parameters and a set of benchmark designs, the tool optimizes routing...
Mingjie Lin, Abbas El Gamal
DAC
2008
ACM
16 years 7 months ago
Optimizing automatic abstraction refinement for generalized symbolic trajectory evaluation
ng Automatic Abstraction Refinement for Generalized Symbolic Trajectory Evaluation Yan Chen Dept. of Computer Science Portland State University Portland, OR, 97207 chenyan@cs.pdx.e...
Yan Chen, Fei Xie, Jin Yang