8093 search results - page 20 / 1619 » Design optimization |
ICCAD
2009
IEEE
14 years 7 months ago
2009
IEEE
We propose a layout-driven test-architecture design and optimization technique for core-based system-on-chips (SoCs) that are fabricated using three-dimensional (3D) integration. ...
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CODES
2003
IEEE
15 years 2 months ago
2003
IEEE
One of the most challenging problems in high-level synthesis is how to quickly explore a wide range of design options to achieve high-quality designs. This paper presents an Integ...
ICCAD
1999
IEEE
15 years 1 months ago
1999
IEEE
We present a method for optimizing and automating component and transistor sizing for CMOS LC oscillators. We observe that the performance measures can be formulated as posynomial...
TNN
2008
14 years 9 months ago
2008
This paper addresses the problem of the optimal design of numerical experiments for the construction of nonlinear surrogate models. We describe a new method, called learner disagre...
ICML
2003
IEEE
15 years 10 months ago
2003
IEEE