8093 search results - page 214 / 1619 » Design optimization |
180
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ISCA
2008
IEEE
16 years 26 days ago
2008
IEEE
Efficiently utilizing off-chip DRAM bandwidth is a critical issue in designing cost-effective, high-performance chip multiprocessors (CMPs). Conventional memory controllers deli...
185
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PLDI
2003
ACM
15 years 11 months ago
2003
ACM
This paper presents the design and implementation of a compiler algorithm that effectively optimizes programs for energy usage using dynamic voltage scaling (DVS). The algorithm ...
145
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ISCA
2007
IEEE
16 years 22 days ago
2007
IEEE
The ever increasing sizes of on-chip caches and the growing domination of wire delay necessitate significant changes to cache hierarchy design methodologies. Many recent proposal...
188
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GECCO
2006
Springer
15 years 10 months ago
2006
Springer
A robust dynamic evolutionary algorithm (labeled RODEA), where both the robust calculation and mutation operator are based on an orthogonal design, is proposed in this paper. Prev...
169
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GECCO
2000
Springer
15 years 10 months ago
2000
Springer
This paper describes an evolutionary way to acquire behaviors of a mobile robot for recognizing environments. We have proposed AEM (Action-based Environment Modeling) approach for...