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ARITH
2009
IEEE
15 years 4 months ago
Datapath Synthesis for Standard-Cell Design
Datapath synthesis for standard-cell design goes through extraction of arithmetic operations from RTL code, high-level arithmetic optimizations and netlist generation. Numerous ar...
Reto Zimmermann
DATE
2009
IEEE
113views Hardware» more  DATE 2009»
15 years 4 months ago
Incorporating graceful degradation into embedded system design
In this work, the focus is put on the behavior of a system in case a fault occurs that disables the system from executing its applications. Instead of executing a random subset of...
Michael Glaß, Martin Lukasiewycz, Christian ...
IPPS
2009
IEEE
15 years 4 months ago
Flexible pipelining design for recursive variable expansion
Many image and signal processing kernels can be optimized for performance consuming a reasonable area by doing loops parallelization with extensive use of pipelining. This paper p...
Zubair Nawaz, Thomas Marconi, Koen Bertels, Todor ...