Sciweavers

5591 search results - page 1053 / 1119
» Design patterns: between programming and software design
Sort
View
LCTRTS
2007
Springer
15 years 3 months ago
Generalizing parametric timing analysis
In the design of real-time and embedded systems, it is important to establish a bound on the worst-case execution time (WCET) of programs to assure via schedulability analysis tha...
Joel Coffman, Christopher A. Healy, Frank Mueller,...
LCTRTS
2007
Springer
15 years 3 months ago
Addressing instruction fetch bottlenecks by using an instruction register file
The Instruction Register File (IRF) is an architectural extension for providing improved access to frequently occurring instructions. An optimizing compiler can exploit an IRF by ...
Stephen Roderick Hines, Gary S. Tyson, David B. Wh...
LCTRTS
2007
Springer
15 years 3 months ago
Compiler-managed partitioned data caches for low power
Set-associative caches are traditionally managed using hardwarebased lookup and replacement schemes that have high energy overheads. Ideally, the caching strategy should be tailor...
Rajiv A. Ravindran, Michael L. Chu, Scott A. Mahlk...
IPPS
2006
IEEE
15 years 3 months ago
Compiler assisted dynamic management of registers for network processors
Modern network processors support high levels of parallelism in packet processing by supporting multiple threads that execute on a micro-engine. Threads switch context upon encoun...
R. Collins, Fernando Alegre, Xiaotong Zhuang, Sant...
PPPJ
2006
ACM
15 years 3 months ago
Juxta-Cat: a JXTA-based platform for distributed computing
In this paper we present a JXTA-based platform, called Juxta-CAT, which is an effort to use the JXTA architecture to build a job execution-sharing distributed environment. The Ju...
Joan Esteve Riasol, Fatos Xhafa
« Prev « First page 1053 / 1119 Last » Next »