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DAC
2009
ACM
16 years 5 months ago
Double patterning lithography friendly detailed routing with redundant via consideration
In double patterning lithography (DPL), coloring conflict and stitch minimization are the two main challenges. Post layout decomposition algorithm [1] [2]may not be enough to achi...
Kun Yuan, Katrina Lu, David Z. Pan
DATE
2003
IEEE
108views Hardware» more  DATE 2003»
15 years 9 months ago
EBIST: A Novel Test Generator with Built-In Fault Detection Capability
Abstract : A novel design methodology for test pattern generation in BIST is presented. Here faults and errors in the generator itself are detected. Two different design methodolog...
Dhiraj K. Pradhan, Chunsheng Liu, Krishnendu Chakr...
ECOOP
2008
Springer
15 years 6 months ago
Exploring Role Based Adaptation
The adapter design pattern [1], commonly used for integration and evolution in component-based systems, is originally described by roles. In classbased systems, the conventional re...
Sebastian Goetz, Ilie Savga
161
Voted
ISPD
2007
ACM
151views Hardware» more  ISPD 2007»
15 years 6 months ago
Pattern sensitive placement for manufacturability
When VLSI technology scales toward 45nm, the lithography wavelength stays at 193nm. This large gap results in strong refractive effects in lithography. Consequently, it is a huge...
Shiyan Hu, Jiang Hu
DC
2001
15 years 6 months ago
A Metadata Kernel for Electronic Permanence
This paper presents a streamlined metadata record format designed to support the permanence of network discoverable objects. It starts with the Dublin Core consensus and distills ...
John A. Kunze