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185
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DATE
1999
IEEE
147views Hardware» more  DATE 1999»
15 years 10 months ago
Efficient BIST Hardware Insertion with Low Test Application Time for Synthesized Data Paths
In this paper, new and efficient BIST methodology and BIST hardware insertion algorithms are presented for RTL data paths obtained from high level synthesis. The methodology is ba...
Nicola Nicolici, Bashir M. Al-Hashimi
IPPS
1999
IEEE
15 years 10 months ago
A Transformational Framework for Skeletal Programs: Overview and Case Study
A structured approach to parallel programming allows to construct applications by composing skeletons, i.e., recurring patterns of task- and data-parallelism. First academic and co...
Sergei Gorlatch, Susanna Pelagatti
164
Voted
MICRO
1999
IEEE
123views Hardware» more  MICRO 1999»
15 years 10 months ago
Improving Branch Predictors by Correlating on Data Values
Branch predictors typically use combinations of branch PC bits and branch histories to make predictions. Recent improvements in branch predictors have come from reducing the effec...
Timothy H. Heil, Zak Smith, James E. Smith
173
Voted
COOPIS
1998
IEEE
15 years 10 months ago
A Generative Communication Service for Database Interoperability
Parallel and distributed programming is conceptually harder to undertake and to understand than sequential programming, because a programmer often has to manage the coexistence an...
Wilhelm Hasselbring, Mark Roantree
165
Voted
GLVLSI
1998
IEEE
122views VLSI» more  GLVLSI 1998»
15 years 10 months ago
Reducing Power Consumption of Dedicated Processors Through Instruction Set Encoding
With the increased clock frequency of modern, high-performance processors over 500 MHz, in some cases, limiting the power dissipation has become the most stringent design target. ...
Luca Benini, Giovanni De Micheli, Alberto Macii, E...