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99
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ISLPED
2003
ACM
113views Hardware» more  ISLPED 2003»
15 years 7 months ago
Reducing power density through activity migration
Power dissipation is unevenly distributed in modern microprocessors leading to localized hot spots with significantly greater die temperature than surrounding cooler regions. Exc...
Seongmoo Heo, Kenneth C. Barr, Krste Asanovic
FDTC
2008
Springer
87views Cryptology» more  FDTC 2008»
15 years 3 months ago
Silicon-level Solutions to Counteract Passive and Active Attacks
This article presents a family of cryptographic ASICs, called SecMat, designed in CMOS 130 nanometer technology by the authors with the help of STMicroelectronics. The purpose of ...
Sylvain Guilley, Laurent Sauvage, Jean-Luc Danger,...
126
Voted
FPT
2005
IEEE
163views Hardware» more  FPT 2005»
15 years 7 months ago
Designing an FPGA SoC Using a Standardized IP Block Interface
Designing Systems on-Chip is becoming increasingly popular as die sizes increase and technology sizes decrease. The complexity of integrating different types of Processing Element...
Lesley Shannon, Blair Fort, Samir Parikh, Arun Pat...
109
Voted
EUC
2006
Springer
15 years 5 months ago
Co-optimization of Performance and Power in a Superscalar Processor Design
Abstract. As process technology scales down, power wall starts to hinder improvements in processor performance. Performance optimization has to proceed under a power constraint. Th...
Yongxin Zhu, Weng-Fai Wong, Stefan Andrei
CSI
2004
353views more  CSI 2004»
15 years 1 months ago
Design and implementation of a mobile database for Java phones
Due to the popularity of electronic commerce and the maturity of wireless technology, mobile users can access the Internet anytime anywhere without having to physically hook up an...
Eric Jui-Lin Lu, Yung-Yuan Cheng