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CSREAESA
2006
14 years 11 months ago
Static Program Partitioning for Embedded Processors
Modern processors have a small on-chip local memory for instructions. Usually it is in the form of a cache but in some cases it is an addressable memory. In the latter, the user is...
Bageshri Sathe, Uday P. Khedker
CASES
2006
ACM
15 years 3 months ago
A case study of multi-threading in the embedded space
The continuing miniaturization of technology coupled with wireless networks has made it feasible to physically embed sensor network systems into the environment. Sensor net proces...
Greg Hoover, Forrest Brewer, Timothy Sherwood
ISSS
1996
IEEE
143views Hardware» more  ISSS 1996»
15 years 1 months ago
DSP Processor/Compiler Co-Design: A Quantitative Approach
In the paper the problem of processor/compiler codesign for digital signal processing and embedded SYstems is discussed. The main principle we follow is the top-down approach char...
Vojin Zivojnovic, Stefan Pees, C. Schälger, M...
IESS
2009
Springer
182views Hardware» more  IESS 2009»
14 years 7 months ago
Modeling Cache Effects at the Transaction Level
Abstract. Embedded system design complexities are growing exponentially. Demand has increased for modeling techniques that can provide both accurate measurements of delay and fast ...
Ardavan Pedram, David Craven, Andreas Gerstlauer
CASES
2003
ACM
15 years 1 months ago
A hierarchical approach for energy efficient application design using heterogeneous embedded systems
Several features such as reconfiguration, voltage and frequency scaling, low-power operating states, duty-cycling, etc. are exploited for latency and energy efficient application ...
Sumit Mohanty, Viktor K. Prasanna