The key issues for register file design in high-performance processors are access time and energy. While previous work has focused on reducing the number of registers, we propose...
New static source routing algorithms for High Performance Computing (HPC) are presented in this work. The target parallel architectures are based on the commonly used fattree netw...
In this paper we present a new approach for the automated mapping of formal descriptions into activity thread implementations. Our approach resolves semantic conflicts by reorderi...
An interface definition language (IDL) is a nontraditional language for describing interfaces between software components. IDL compilers generate “stubs” that provide separat...
Eric Eide, Kevin Frei, Bryan Ford, Jay Lepreau, Ga...
Pipelining has been used in the design of many PRAM algorithms to reduce their asymptotic running time. Paul, Vishkin, and Wagener (PVW) used the approach in a parallel implementat...