5672 search results - page 17 / 1135 » Design techniques for low-power systems |
109
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ICCAD
1995
IEEE
15 years 3 months ago
1995
IEEE
In this paper we investigate activity-driven clock trees to reduce the dynamic power consumption of synchronous digital CMOS circuits. Sections of an activity-driven clock tree ca...
HOTI
2008
IEEE
15 years 6 months ago
2008
IEEE
Several types of low power passive equalizer is proposed and optimized in this work. The equalizer topologies include T-junction, parallel R-C and series R-L structures. These str...
SAMOS
2004
Springer
15 years 5 months ago
2004
Springer
Embedded digital signal processors for baseband communication systems have stringent design constraints including high computational bandwidth, low power consumption, and low inter...
107
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DAC
1999
ACM
16 years 20 days ago
1999
ACM
We present a novel approach that minimizes the power consumption of embedded core-based systems through hardware/software partitioning. Our approach is based on the idea of mapping...
ISLPED
2005
ACM
15 years 5 months ago
2005
ACM
This paper discusses a number of circuit techniques which address the DC and AC distortion performance of a low power current steering Digital-to-Analog Converter design. The desi...