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AHS
2007
IEEE
349views Hardware» more  AHS 2007»
15 years 8 months ago
A Low Power Implementation of H.264 Adaptive Deblocking Filter Algorithm
In this paper, we present a low power implementation of H.264 adaptive deblocking filter (DBF) algorithm on ARM Versatile / PB926EJ-S Development Board. The DBF hardware is implem...
Mustafa Parlak, Ilker Hamzaoglu
116
Voted
ASPDAC
2007
ACM
122views Hardware» more  ASPDAC 2007»
15 years 5 months ago
A Novel Reconfigurable Low Power Distributed Arithmetic Architecture for Multimedia Applications
- The use of reconfigurable cores in system on chip (SoC) designs is increasingly becoming a trend. Such cores are being used for their flexibility, powerful functionality and low ...
Zhenyu Liu, Tughrul Arslan, Ahmet T. Erdogan
ASAP
2009
IEEE
157views Hardware» more  ASAP 2009»
15 years 11 months ago
Low-Power ASIP Architecture Exploration and Optimization for Reed-Solomon Processing
The advent of the mobile age has heavily changed the requirements of today’s communication devices. Data transmission over interference-prone wireless channels requires addition...
Andreas Genser, Christian Bachmann, Christian Steg...
ALGOSENSORS
2004
Springer
15 years 7 months ago
WiseMAC: An Ultra Low Power MAC Protocol for Multi-hop Wireless Sensor Networks
WiseMAC is a medium access control protocol designed for wireless sensor networks. This protocol is based on non-persistent CSMA and uses the preamble sampling technique to minimiz...
Amre El-Hoiydi, Jean-Dominique Decotignie
DFT
2005
IEEE
132views VLSI» more  DFT 2005»
15 years 3 months ago
Low Power BIST Based on Scan Partitioning
A built-in self-test (BIST) scheme is presented which both reduces overhead for detecting random-pattern-resistant (r.p.r.) faults as well as reduces power consumption during test...
Jinkyu Lee, Nur A. Touba