5672 search results - page 28 / 1135 » Design techniques for low-power systems |
86
Voted
DATE
2004
IEEE
15 years 5 months ago
2004
IEEE
For extremely Low-power Logic, three very new and promising techniques will be described. The first are methods on circuit and system level for reduced supply voltages. In large l...
96
Voted
SAMOS
2007
Springer
15 years 8 months ago
2007
Springer
This paper presents an overview of trends in low power handset SDR implementations. With the market for SDR-enabled handsets expected to grow to 200M units by 2014, the barriers to...
91
Voted
ASPDAC
2006
ACM
15 years 7 months ago
2006
ACM
Abstract— The memory subsystem is known to comprise a significant fraction of the power dissipation in embedded systems. The memory addressing strategy, which determines the seq...
165
click to vote
EVOW
1999
Springer
15 years 6 months ago
1999
Springer
A technique is proposed to reduce the peak power consumption of sequential circuits during test pattern application. High-speed computation intensive VLSI systems, as telecommunica...
128
click to vote
MOBIHOC
2000
ACM
15 years 6 months ago
2000
ACM
ln the future, wireless networking will be embedded into a wide variety of common, everyday objects [1]. In many embedded networking situations, the communicating nodes will be ver...