Sciweavers

5672 search results - page 41 / 1135
» Design techniques for low-power systems
Sort
View
DAC
2003
ACM
16 years 2 months ago
Implications of technology scaling on leakage reduction techniques
The impact of technology scaling on three run-time leakage reduction techniques (Input Vector Control, Body Bias Control and Power Supply Gating) is evaluated by determining limit...
Yuh-Fang Tsai, David Duarte, Narayanan Vijaykrishn...
ASPDAC
2001
ACM
83views Hardware» more  ASPDAC 2001»
15 years 5 months ago
Trace-driven system-level power evaluation of system-on-a-chip peripheral cores
Our earlier work for fast evaluation of power consumption of general cores in a system-on-a-chip described techniques that involved isolating high-level instructions of a core, me...
Tony Givargis, Frank Vahid, Jörg Henkel
IPSN
2007
Springer
15 years 8 months ago
Micro power meter for energy monitoring of wireless sensor networks at scale
We present SPOT, a scalable power observation tool that enables in situ measurement of nodal power and energy over a dynamic range exceeding four decades or a temporal resolution ...
Xiaofan Jiang, Prabal Dutta, David E. Culler, Ion ...
CODES
2008
IEEE
15 years 8 months ago
Static analysis of processor stall cycle aggregation
Processor Idle Cycle Aggregation (PICA) is a promising approach for low power execution of processors, in which small memory stalls are aggregated to create a large one, and the p...
Jongeun Lee, Aviral Shrivastava
ISLPED
1995
ACM
134views Hardware» more  ISLPED 1995»
15 years 5 months ago
High-throughput and low-power DSP using clocked-CMOS circuitry
We argue that the clocked-CMOS (C2MOS) circuit family provides a very high throughput and low power alternative to other existing circuit techniques for the fast developing market...
Manjit Borah, Robert Michael Owens, Mary Jane Irwi...