5672 search results - page 44 / 1135 » Design techniques for low-power systems |
131
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CASES
2006
ACM
15 years 5 months ago
2006
ACM
Ever increasing performance requirements have elevated deeply pipelined architectures to a standard even in the embedded processor domain, requiring the incorporation of dynamic b...
124
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DAC
2005
ACM
16 years 2 months ago
2005
ACM
Dynamic voltage scaling (DVS) is a well-known low power design technique that reduces the processor energy by slowing down the DVS processor and stretching the task execution time...
122
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GLVLSI
2003
IEEE
15 years 7 months ago
2003
IEEE
We propose an approach for reducing the energy consumption of address buses that targets both the switching and the crosstalk components of power dissipation. The method is based ...
DAC
2002
ACM
16 years 2 months ago
2002
ACM
Profiling an application executing on a microprocessor is part of the solution to numerous software and hardware optimization and design automation problems. Most current profilin...
119
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IPCCC
2006
IEEE
15 years 8 months ago
2006
IEEE
Low power has been considered as an important issue in instruction cache (I-cache) designs. Several studies have shown that the I-cache can be tuned to reduce power. These techniq...