Sciweavers

5672 search results - page 47 / 1135
» Design techniques for low-power systems
Sort
View
ICPPW
2007
IEEE
15 years 8 months ago
Power Management of Multicore Multiple Voltage Embedded Systems by Task Scheduling
We study the role of task-level scheduling in power management on multicore multiple voltage embedded systems. Multicore on-achip, in particular DSP systems, can greatly improve p...
Gang Qu
DAC
2002
ACM
16 years 2 months ago
Unlocking the design secrets of a 2.29 Gb/s Rijndael processor
This contribution describes the design and performance testing of an Advanced Encryption Standard (AES) compliant encryption chip that delivers 2.29 GB/s of encryption throughput ...
Patrick Schaumont, Henry Kuo, Ingrid Verbauwhede
ICCAD
1999
IEEE
84views Hardware» more  ICCAD 1999»
15 years 6 months ago
Power minimization using system-level partitioning of applications with quality of service requirements
Design systems to provide various quality of service (QoS) guarantees has received a lot of attentions due to the increasing popularity of real-time multimedia and wireless commun...
Gang Qu, Miodrag Potkonjak
ISCAS
2005
IEEE
152views Hardware» more  ISCAS 2005»
15 years 7 months ago
Robust watermarking of music signals by cepstrum modification
— A method of embedding a predetermined watermark in an audio signal is described for audio music copyright protection applications. The proposed technique applies the psychoacou...
Kaliappan Gopalan
VTS
2005
IEEE
95views Hardware» more  VTS 2005»
15 years 7 months ago
SRAM Retention Testing: Zero Incremental Time Integration with March Algorithms
Testing data retention faults (DRFs), particularly in integrated systems on chip comprised of very large number of various sizes and types of embedded SRAMs is challenging and typ...
Baosheng Wang, Yuejian Wu, Josh Yang, André...