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DAC
2007
ACM
15 years 10 months ago
Transition Delay Fault Test Pattern Generation Considering Supply Voltage Noise in a SOC Design
Due to shrinking technology, increasing functional frequency and density, and reduced noise margins with supply voltage scaling, the sensitivity of designs to supply voltage noise...
Nisar Ahmed, Mohammad Tehranipoor, Vinay Jayaram
ISPASS
2008
IEEE
15 years 4 months ago
Metrics for Architecture-Level Lifetime Reliability Analysis
Abstract— This work concerns metrics for evaluating microarchitectural enhancements to improve processor lifetime reliability. A commonly reported reliability metric is mean time...
Pradeep Ramachandran, Sarita V. Adve, Pradip Bose,...
61
Voted
DATE
2007
IEEE
108views Hardware» more  DATE 2007»
15 years 4 months ago
Evaluation of design for reliability techniques in embedded flash memories
Non-volatile Flash memories are becoming more and more popular in Systems-on-Chip (SoC). Embedded Flash (eFlash) memories are based on the well-known floatinggate transistor conce...
Benoît Godard, Jean Michel Daga, Lionel Torr...
LCTRTS
2010
Springer
14 years 7 months ago
Integrating safety analysis into the model-based development toolchain of automotive embedded systems
The automotive industry has a growing demand for the seamless integration of safety analysis tools into the model-based development toolchain for embedded systems. This requires t...
Matthias Biehl, De-Jiu Chen, Martin Törngren
ISCA
2007
IEEE
120views Hardware» more  ISCA 2007»
15 years 4 months ago
Examining ACE analysis reliability estimates using fault-injection
ACE analysis is a technique to provide an early reliability estimate for microprocessors. ACE analysis couples data from performance models with low level design details to identi...
Nicholas J. Wang, Aqeel Mahesri, Sanjay J. Patel