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» Design tools for reliability analysis
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DSN
2006
IEEE
16 years 2 days ago
Exploring Fault-Tolerant Network-on-Chip Architectures
The advent of deep sub-micron technology has exacerbated reliability issues in on-chip interconnects. In particular, single event upsets, such as soft errors, and hard faults are ...
Dongkook Park, Chrysostomos Nicopoulos, Jongman Ki...
ICDCS
2006
IEEE
16 years 2 days ago
A Semantic Overlay for Self- Peer-to-Peer Publish/Subscribe
Publish/Subscribe systems provide a useful platform for delivering data (events) from publishers to subscribers in an anonymous fashion in distributed networks. In this paper, we ...
Emmanuelle Anceaume, Maria Gradinariu, Ajoy Kumar ...
GLVLSI
2005
IEEE
118views VLSI» more  GLVLSI 2005»
15 years 11 months ago
High-diagnosability online built-in self-test of FPGAs via iterative bootstrapping
We develop a novel on-line built-in self-test (BIST) technique for testing FPGAs that has a very high diagnosability even in presence of clustered faults, a fault pattern for whic...
Vishal Suthar, Shantanu Dutt
ASPDAC
2008
ACM
174views Hardware» more  ASPDAC 2008»
15 years 8 months ago
Chebyshev Affine Arithmetic based parametric yield prediction under limited descriptions of uncertainty
In modern circuit design, it is difficult to provide reliable parametric yield prediction since the real distribution of process data is hard to measure. Most existing approaches ...
Jin Sun, Yue Huang, Jun Li, Janet Meiling Wang
ICSE
2010
IEEE-ACM
15 years 10 months ago
STORM: static unit checking of concurrent programs
Concurrency is inherent in today’s software. Unexpected interactions between concurrently executing threads often cause subtle bugs in concurrent programs. Such bugs are hard to...
Zvonimir Rakamaric