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CASES
2006
ACM
15 years 7 months ago
Incremental elaboration for run-time reconfigurable hardware designs
We present a new technique for compiling run-time reconfigurable hardware designs. Run-time reconfigurable embedded systems can deliver promising benefits over implementations in ...
Arran Derbyshire, Tobias Becker, Wayne Luk
CHES
2006
Springer
205views Cryptology» more  CHES 2006»
15 years 7 months ago
Automated Design of Cryptographic Devices Resistant to Multiple Side-Channel Attacks
Balanced dynamic dual-rail gates and asynchronous circuits have been shown, if implemented correctly, to have natural and efficient resistance to side-channel attacks. Despite thei...
Konrad J. Kulikowski, Alexander B. Smirnov, Alexan...
JUCS
2008
166views more  JUCS 2008»
15 years 3 months ago
Learning Design in Adaptive Educational Hypermedia Systems
: After more than ten years of research aiming at defining methods and techniques to deliver personalized instruction, Adaptive Educational Hypermedia Systems have not made the jum...
Adriana J. Berlanga, Francisco José Garc&ia...
ASPDAC
2007
ACM
119views Hardware» more  ASPDAC 2007»
15 years 7 months ago
Optimum Prefix Adders in a Comprehensive Area, Timing and Power Design Space
Parallel prefix adder is the most flexible and widely-used binary adder for ASIC designs. Many high-level synthesis techniques have been developed to find optimal prefix structures...
Jianhua Liu, Yi Zhu, Haikun Zhu, Chung-Kuan Cheng,...
ASWEC
2001
IEEE
15 years 7 months ago
Extending the UML for Designing Jack Agents
Mainstreaming and industrialising agent technologies requires suitable methodological and technological support for the various engineering activities associated with managing the...
Michael Papasimeon, Clinton Heinze