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ASPDAC
2007
ACM
144views Hardware» more  ASPDAC 2007»
15 years 1 months ago
Parameter Reduction for Variability Analysis by Slice Inverse Regression (SIR) Method
With semiconductor fabrication technologies scaled below 100 nm, the design-manufacturing interface becomes more and more complicated. The resultant process variability causes a nu...
Alexander V. Mitev, Michael Marefat, Dongsheng Ma,...
ASPDAC
2005
ACM
81views Hardware» more  ASPDAC 2005»
14 years 11 months ago
Design and design automation of rectification logic for engineering change
In a later stage of a VLSI design, it is quite often to modify a design implementation to accommodate the new specification, design errors, or to meet design constraints. In addit...
Cheng-Hung Lin, Yung-Chang Huang, Shih-Chieh Chang...
ASPDAC
2007
ACM
101views Hardware» more  ASPDAC 2007»
15 years 1 months ago
A New Methodology for Interconnect Parasitics Extraction Considering Photo-Lithography Effects
Abstract-- Due to photo-lithography effects and manufacture process variations, the actual features fabricated on the wafer are different from the designed ones. This difference ca...
Ying Zhou, Zhuo Li, Yuxin Tian, Weiping Shi, Frank...
GLVLSI
2007
IEEE
167views VLSI» more  GLVLSI 2007»
15 years 4 months ago
A new approach to logic synthesis of multi-output boolean functions on pal-based CPLDS
A PAL-based logic block is the core of great majority of contemporary CPLD devices. The purpose of the paper is to present a new approach to multi-level synthesis for PAL-based CP...
Dariusz Kania
GECCO
2006
Springer
200views Optimization» more  GECCO 2006»
15 years 1 months ago
A new approach for shortest path routing problem by random key-based GA
In this paper, we propose a Genetic Algorithm (GA) approach using a new paths growth procedure by the random key-based encoding for solving Shortest Path Routing (SPR) problem. An...
Mitsuo Gen, Lin Lin