5866 search results - page 259 / 1174 » Designing Accelerator-Based Distributed Systems for High Per... |
128
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DAC
2000
ACM
16 years 5 months ago
2000
ACM
erse approaches at all levels of abstraction starting from the physical level up to the system level. Experience shows that a highlevel method may have a larger impact since the de...
159
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JSA
2010
14 years 11 months ago
2010
The high chip-level integration enables the implementation of large-scale parallel processing architectures with 64 and more processing nodes on a single chip or on an FPGA device...
138
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MSWIM
2004
ACM
15 years 9 months ago
2004
ACM
Today, three different physical (PHY) layers for the IEEE 802.11 WLAN are available (802.11a/b/g); they all provide multi-rate capabilities. To achieve a high performance under v...
141
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FPL
2009
Springer
15 years 8 months ago
2009
Springer
Restricted Boltzmann Machines (RBMs) — the building block for newly popular Deep Belief Networks (DBNs) — are a promising new tool for machine learning practitioners. However,...
174
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SIGMETRICS
2008
ACM
15 years 4 months ago
2008
ACM
In this paper, we consider hybrid peer-to-peer systems where users form an unstructured peer-to-peer network with the purpose of assisting a server in the distribution of data. We...