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DATE
2003
IEEE
86views Hardware» more  DATE 2003»
15 years 3 months ago
Layered, Multi-Threaded, High-Level Performance Design
A primary goal of high-level modeling is to efficiently explore a broad design space, converging on an optimal or near-optimal system architecture before moving to a more detaile...
Andrew S. Cassidy, JoAnn M. Paul, Donald E. Thomas
GRID
2004
Springer
15 years 3 months ago
Design, Implementation and Performance Evaluation of GridRPC Programming Middleware for a Large-Scale Computational Grid
This paper reports on the design, implementation and performance evaluation of a suite of GridRPC programming middleware called Ninf-G Version 2 (Ninf-G2). NinfG2 is a reference i...
Yoshio Tanaka, Hiroshi Takemiya, Hidemoto Nakada, ...
NSDI
2004
14 years 11 months ago
Designing a DHT for Low Latency and High Throughput
Designing a wide-area distributed hash table (DHT) that provides high-throughput and low-latency network storage is a challenge. Existing systems have explored a range of solution...
Frank Dabek, Jinyang Li, Emil Sit, James Robertson...
FPL
1999
Springer
74views Hardware» more  FPL 1999»
15 years 2 months ago
On Tool Integration in High-Performance FPGA Design Flows
Abstract. High-performance design flows for FPGAs often rely on module generators to counter coarse logic-block granularity and limited routing resources, However, the very flexi...
Andreas Koch
TCSV
2010
14 years 4 months ago
High Performance Stereo Vision Designed for Massively Data Parallel Platforms
Abstract--Real-time stereo vision is attractive in many applications like robot navigation and 3D scene reconstruction. Data parallel platforms, e.g. GPU, is often used for real-ti...
Wei Yu, Tsuhan Chen, Franz Franchetti, James C. Ho...