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171
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FPL
2004
Springer
205views Hardware» more  FPL 2004»
15 years 10 months ago
A System Level Resource Estimation Tool for FPGAs
Abstract. High level modeling tools make it possible to synthesize a high performance FPGA design directly from a Simulink model. Accurate estimates of the FPGA resources required ...
Changchun Shi, James Hwang, Scott McMillan, Ann Ro...
138
Voted
DATE
2003
IEEE
103views Hardware» more  DATE 2003»
15 years 10 months ago
Verification of the RF Subsystem within Wireless LAN System Level Simulation
Today’s mobile communication systems use sophisticated signal processing to achieve high transmission rates. Therefore a high complexity in the digital system part as well as ve...
Uwe Knöchel, Thomas Markwirth, Jürgen Ha...
OSDI
2002
ACM
16 years 5 months ago
Vertigo: Automatic Performance-Setting for Linux
Combining high performance with low power consumption is becoming one of the primary objectives of processor designs. Instead of relying just on sleep mode for conserving power, a...
Krisztián Flautner, Trevor N. Mudge
117
Voted
ISSS
1997
IEEE
83views Hardware» more  ISSS 1997»
15 years 9 months ago
A Scheduling and Pipelining Algorithm for Hardware/Software Systems
Given a hardware/software partitioned specification and an allocation (number and type) of processors, we present an algorithm to (1) map each of the software behaviors (or tasks...
Smita Bakshi, Daniel Gajski
PPOPP
2005
ACM
15 years 10 months ago
Exposing speculative thread parallelism in SPEC2000
As increasing the performance of single-threaded processors becomes increasingly difficult, consumer desktop processors are moving toward multi-core designs. One way to enhance th...
Manohar K. Prabhu, Kunle Olukotun