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ISCAS
2005
IEEE
132views Hardware» more  ISCAS 2005»
15 years 3 months ago
A high performance distributed-parallel-processor architecture for 3D IIR digital filters
—Real-time spatio-temporal VLSI 3D IIR digital filters may be used for imaging or beamforming applications employing 3D input signals from synchronously-sampled multi-sensor arra...
Arjuna Madanayake, Leonard T. Bruton
CCGRID
2005
IEEE
15 years 3 months ago
A batch scheduler with high level components
In this article we present the design choices and the evaluation of a batch scheduler for large clusters, named OAR. This batch scheduler is based upon an original design that emp...
Nicolas Capit, Georges Da Costa, Yiannis Georgiou,...
CLUSTER
2007
IEEE
15 years 4 months ago
High performance virtual machine migration with RDMA over modern interconnects
— One of the most useful features provided by virtual machine (VM) technologies is the ability to migrate running OS instances across distinct physical nodes. As a basis for many...
Wei Huang, Qi Gao, Jiuxing Liu, Dhabaleswar K. Pan...
HPDC
2000
IEEE
15 years 2 months ago
Event Services for High Performance Computing
The Internet and the Grid are changing the face of high performance computing. Rather than tightly-coupled SPMD-style components running in a single cluster, on a parallel machine...
Greg Eisenhauer, Fabián E. Bustamante, Kars...
HCW
2000
IEEE
15 years 2 months ago
Heterogeneity as Key Feature of High Performance Computing: the PQE1 Prototype
In this work we present the results of a project aimed at assembling an hybrid massively parallel machine, the PQE1 prototype, devoted to the simulation of complex physical models...
Paolo Palazzari, Lidia Arcipiani, Massimo Celino, ...