ABSTRACT { Sub-micron technologies and the increasing size and complexity of integrated components have aggravated the eect of long interconnects and buses, compared to that of ga...
We present APHRODITE, an architecture designed to reduce false positives in network intrusion-detection systems. APHRODITE works by detecting anomalies in the outgoing traffic, an...
We present an architecture1 designed for alert verification (i.e., to reduce false positives) in network intrusion-detection systems. Our technique is based on a systematic (and a...
This paper presents a methodology for cycle-accurate simulation of energy dissipation in embedded systems. The ARM Ltd. 1 instruction-level cycle-accurate simulator is extended wi...
– The implementation and the fault simulation technique for the highly reliable digital design using two FPGAs under a processor control is presented. Two FPGAs are used for dupl...