Sciweavers

1155 search results - page 120 / 231
» Designing Benchmarks for P2P Systems
Sort
View
FPGA
2003
ACM
137views FPGA» more  FPGA 2003»
15 years 9 months ago
Customized regular channel design in FPGAs
FPGAs are one of the essential components in platform-based embedded systems. Such systems are customized and applied only to a limited set of applications. Also some applications...
Elaheh Bozorgzadeh, Majid Sarrafzadeh
FPL
2007
Springer
106views Hardware» more  FPL 2007»
15 years 10 months ago
RAMP Blue: A Message-Passing Manycore System in FPGAs
We are developing a set of reusable design blocks and several prototype systems for emulation of multi-core architectures in FPGAs. RAMP Blue is the first of these prototypes and...
Alex Krasnov, Andrew Schultz, John Wawrzynek, Greg...
DFT
2003
IEEE
113views VLSI» more  DFT 2003»
15 years 9 months ago
Buffer and Controller Minimisation for Time-Constrained Testing of System-On-Chip
Test scheduling and Test Access Mechanism (TAM) design are two important tasks in the development of a System-on-Chip (SOC) test solution. Previous test scheduling techniques assu...
Anders Larsson, Erik Larsson, Petru Eles, Zebo Pen...
ISPD
1997
ACM
110views Hardware» more  ISPD 1997»
15 years 8 months ago
Performance driven global routing for standard cell design
Advances in fabrication technology have resulted in a continual shrinkage of device dimensions. This has resulted in smaller device delays, greater resistance along interconnect w...
Jason Cong, Patrick H. Madden
HPCA
2006
IEEE
16 years 4 months ago
High performance file I/O for the Blue Gene/L supercomputer
Parallel I/O plays a crucial role for most data-intensive applications running on massively parallel systems like Blue Gene/L that provides the promise of delivering enormous comp...
Hao Yu, Ramendra K. Sahoo, C. Howson, G. Almasi, J...