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» Designing Benchmarks for P2P Systems
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ASPDAC
2009
ACM
108views Hardware» more  ASPDAC 2009»
15 years 4 months ago
Synthesis of networks on chips for 3D systems on chips
Three-dimensional stacking of silicon layers is emerging as a promising solution to handle the design complexity and heterogeneity of Systems on Chips (SoCs). Networks on Chips (N...
Srinivasan Murali, Ciprian Seiculescu, Luca Benini...
DATE
2007
IEEE
99views Hardware» more  DATE 2007»
15 years 4 months ago
Very wide register: an asymmetric register file organization for low power embedded processors
In current embedded systems processors, multi-ported register files are one of the most power hungry parts of the processor, even when they are clustered. This paper presents a n...
Praveen Raghavan, Andy Lambrechts, Murali Jayapala...
78
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LCPC
2005
Springer
15 years 3 months ago
Interprocedural Symbolic Range Propagation for Optimizing Compilers
Abstract. We have designed and implemented an interprocedural algorithm to analyze symbolic value ranges that can be assumed by variables at any given point in a program. Our algor...
Hansang Bae, Rudolf Eigenmann
91
Voted
ICCAD
2001
IEEE
184views Hardware» more  ICCAD 2001»
15 years 7 months ago
CALiBeR: A Software Pipelining Algorithm for Clustered Embedded VLIW Processors
In this paper we describe a software pipelining framework, CALiBeR (Cluster Aware Load Balancing Retiming Algorithm), suitable for compilers targeting clustered embedded VLIW proc...
Cagdas Akturan, Margarida F. Jacome
ICCAD
2008
IEEE
103views Hardware» more  ICCAD 2008»
15 years 7 months ago
Hardware protection and authentication through netlist level obfuscation
—Hardware Intellectual Property (IP) cores have emerged as an integral part of modern System–on–Chip (SoC) designs. However, IP vendors are facing major challenges to protect...
Rajat Subhra Chakraborty, Swarup Bhunia