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HPDC
1999
IEEE
15 years 2 months ago
Dodo: A User-level System for Exploiting Idle Memory in Workstation Clusters
In this paper, we present the design and implementation of Dodo, an e cient user-level system for harvesting idle memory in o -the-shelf clusters of workstations. Dodo enables dat...
Samir Koussih, Anurag Acharya, Sanjeev Setia
FPGA
1998
ACM
142views FPGA» more  FPGA 1998»
15 years 2 months ago
A Hybrid Complete-Graph Partial-Crossbar Routing Architecture for Multi-FPGA Systems
Multi-FPGA systems (MFSs) are used as custom computing machines, logic emulators and rapid prototyping vehicles. A key aspect of these systems is their programmable routing archit...
Mohammed A. S. Khalid, Jonathan Rose
DAC
2004
ACM
15 years 11 months ago
Dynamic FPGA routing for just-in-time FPGA compilation
Just-in-time (JIT) compilation has previously been used in many applications to enable standard software binaries to execute on different underlying processor architectures. Howev...
Roman L. Lysecky, Frank Vahid, Sheldon X.-D. Tan
CEC
2009
IEEE
15 years 4 months ago
Gate-level optimization of polymorphic circuits using Cartesian Genetic Programming
— Polymorphic digital circuits contain ordinary and polymorphic gates. In the past, Cartesian Genetic Programming (CGP) has been applied to synthesize polymorphic circuits at the...
Zbysek Gajda, Lukás Sekanina
FPL
2005
Springer
110views Hardware» more  FPL 2005»
15 years 3 months ago
CUSTARD - A Customisable Threaded FPGA Soft Processor and Tools
Abstract. We propose CUSTARD — CUStomisable Threaded ARchitecture — a soft processor design space that combines support for multiple hardware threads and automatically generate...
Robert G. Dimond, Oskar Mencer, Wayne Luk