1155 search results - page 158 / 231 » Designing Benchmarks for P2P Systems |
IISWC
2009
IEEE
15 years 4 months ago
2009
IEEE
— Programming to exploit the resources in a multicore system remains a major obstacle for both computer and software engineers. Transactional memory offers an attractive alternat...
GLVLSI
2005
IEEE
15 years 3 months ago
2005
IEEE
The instruction cache is a popular target for optimizations of microprocessor-based systems because of the cache’s high impact on system performance and power, and because of th...
CODES
2007
IEEE
15 years 4 months ago
2007
IEEE
With growing capacities of flash memories, an efficient layer to manage read and write access to flash is required. NFTL is a widely used block based flash translation layer de...
DAC
2006
ACM
15 years 11 months ago
2006
ACM
Design and verification of systems at the Register-Transfer (RT) or behavioral level require the ability to reason at higher levels of abstraction. Difference logic consists of an...
DATE
2006
IEEE
15 years 4 months ago
2006
IEEE
A communication-centric design approach, Networks on Chips (NoCs), has emerged as the design paradigm for designing a scalable communication infrastructure for future Systems on C...