7778 search results - page 1404 / 1556 » Designing Controllers for Reachability |
127
Voted
GMP
2006
IEEE
15 years 9 months ago
2006
IEEE
In geometric modeling and processing, computer graphics and computer vision, smooth surfaces are approximated by discrete triangular meshes reconstructed from sample points on the...
113
Voted
IEEEPACT
2006
IEEE
15 years 9 months ago
2006
IEEE
Modern out-of-order processors with non-blocking caches exploit Memory-Level Parallelism (MLP) by overlapping cache misses in a wide instruction window. The exploitation of MLP, h...
99
Voted
ASPDAC
2006
ACM
15 years 9 months ago
2006
ACM
— Due to its great flexibility, gridless routing is desirable for nanometer circuit designs that use variable wire widths and spacings. Nevertheless, it is much more difficult ...
118
click to vote
CASES
2006
ACM
15 years 9 months ago
2006
ACM
With advances in process technology, soft errors (SE) are becoming an increasingly critical design concern. Due to their large area and high density, caches are worst hit by soft ...
133
Voted
CASES
2006
ACM
15 years 9 months ago
2006
ACM
Random access memory (RAM) is tightly-constrained in many embedded systems. This is especially true for the least expensive, lowest-power embedded systems, such as sensor network ...