In this paper, we discuss the design and engineering of the PolyBot board, a custom robot controller board. This board has many features which make it suitable for use in the desi...
Loop caches provide an effective method for decreasing memory hierarchy energy consumption by storing frequently executed code in a more energy efficient structure than the level ...
This paper summarises the author’s PhD research on the representation and control of time in tangible user interfaces. The aim of the research is to create a theoretical framewo...
Subthreshold logic is showing good promise as a viable ultra-low-power circuit design technique for powerlimited applications. For this design technique to gain widespread adoption...
Biswajit Mishra, Bashir M. Al-Hashimi, Mark Zwolin...
Abstract— As FPGA designs in 65nm are being explored, reducing leakage power becomes an important design issue. A significant portion of the FPGA leakage is expended in the unus...
Suresh Srinivasan, Aman Gayasen, Narayanan Vijaykr...