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MICRO
1997
IEEE
86views Hardware» more  MICRO 1997»
13 years 10 months ago
Streamlining Inter-Operation Memory Communication via Data Dependence Prediction
We revisit memory hierarchy design viewing memory as an inter-operation communication agent. This perspective leads to the development of novel methods of performing inter-operati...
Andreas Moshovos, Gurindar S. Sohi
DAC
2006
ACM
14 years 7 months ago
A thermally-aware performance analysis of vertically integrated (3-D) processor-memory hierarchy
Three-dimensional (3-D) integrated circuits have emerged as promising candidates to overcome the interconnect bottlenecks of nanometer scale designs. While they offer several othe...
Gian Luca Loi, Banit Agrawal, Navin Srivastava, Sh...
ISPASS
2007
IEEE
14 years 19 days ago
CA-RAM: A High-Performance Memory Substrate for Search-Intensive Applications
This paper proposes a specialized memory structure called CA-RAM (Content Addressable Random Access Memory) to accelerate search operations present in many important real-world ap...
Sangyeun Cho, Joel R. Martin, Ruibin Xu, Mohammad ...
CORR
2010
Springer
173views Education» more  CORR 2010»
13 years 6 months ago
Towards Conceptual Multidimensional Design in Decision Support Systems
Multidimensional databases support efficiently on-line analytical processing (OLAP). In this paper, we depict a model dedicated to multidimensional databases. The approach we prese...
Olivier Teste
ASPLOS
2010
ACM
14 years 1 months ago
Dynamically replicated memory: building reliable systems from nanoscale resistive memories
DRAM is facing severe scalability challenges in sub-45nm technology nodes due to precise charge placement and sensing hurdles in deep-submicron geometries. Resistive memories, suc...
Engin Ipek, Jeremy Condit, Edmund B. Nightingale, ...