397 search results - page 27 / 80 » Designing Fast Asynchronous Circuits |
DATE
2004
IEEE
15 years 5 months ago
2004
IEEE
Abstract-- Digital designs can be mapped to different implementations using diverse approaches, with varying cost criteria. Post-processing transforms, such as transistor sizing ca...
125
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ICCAD
2003
IEEE
15 years 6 months ago
2003
IEEE
: This paper presents FROSTY, a computer program for automatically extracting the hierarchy of a large-scale digital CMOS circuit from its transistor-level netlist description and ...
104
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GLVLSI
2003
IEEE
15 years 6 months ago
2003
IEEE
We introduce a simple hierarchical design technique for using dynamic domino circuits to build high-performance self-timed data path circuits. We wrap the dynamic domino circuit i...
113
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GLVLSI
2003
IEEE
15 years 6 months ago
2003
IEEE
With scaling down to deep submicron and nanometer technologies, noise immunity is becoming a metric of the same importance as power, speed, and area. Smaller feature sizes, low vo...
100
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CORR
2010
Springer
15 years 1 days ago
2010
Springer
We present a novel self-stabilizing algorithm for minimum spanning tree (MST) construction. The space complexity of our solution is O(log2 n) bits and it converges in O(n2 ) round...