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DATE
2003
IEEE
132views Hardware» more  DATE 2003»
15 years 4 months ago
Introspection in System-Level Language Frameworks: Meta-Level vs. Integrated
Reflection and automated introspection of a design in system level design frameworks are seen as necessities for the CAD tools to manipulate the designs within the tools. These f...
Frederic Doucet, Sandeep K. Shukla, Rajesh K. Gupt...
SAC
1995
ACM
15 years 2 months ago
Design of a VLSI very high speed reconfigurable digital fuzzy processor
A trigger system in High Energy Physics Experiments (HEPE) has to decide, in few µs, if the data related to a nuclear event have to be stored or not. Normally, these data, are co...
Enzo Gandolfi, Alessandro Gabrielli, Massimo Maset...
ISCA
1997
IEEE
103views Hardware» more  ISCA 1997»
15 years 3 months ago
Designing High Bandwidth On-Chip Caches
In this paper we evaluate the performance of high bandwidth caches that employ multiple ports, multiple cycle hit times, on-chip DRAM, and a line buffer to find the organization t...
Kenneth M. Wilson, Kunle Olukotun
INFOVIS
2003
IEEE
15 years 4 months ago
Exploring High-D Spaces with Multiform Matrices and Small Multiples
We introduce an approach to visual analysis of multivariate data that integrates several methods from information visualization, exploratory data analysis (EDA), and geovisualizat...
Alan M. MacEachren, Xiping Dai, Frank Hardisty, Di...
ICIP
2007
IEEE
16 years 27 days ago
Analysis and Integrated Architecture Design for Overlap Smooth and in-Loop Deblocking Filter in VC-1
Unlike familiar macroblock-based in-loop deblocking filter in H.264, the filters of VC-1 perform all horizontal edges (for in-loop deblocking filtering) or vertical edges (for ove...
Yen-Lin Lee, Truong Nguyen