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WETICE
1996
IEEE
15 years 10 months ago
Role-based security for distributed object systems
This paper describes a security architecture designed to support role-based access control for distributed object systems in a large-scale, multi-organisational enterprise in whic...
Nicholas Yialelis, Emil Lupu, Morris Sloman
249
Voted
HIPEAC
2011
Springer
14 years 6 months ago
NoC-aware cache design for multithreaded execution on tiled chip multiprocessors
In chip multiprocessors (CMPs), data accesslatency dependson the memory hierarchy organization, the on-chip interconnect (NoC), and the running workload. Reducing data access late...
Ahmed Abousamra, Alex K. Jones, Rami G. Melhem
144
Voted
ETS
2007
IEEE
91views Hardware» more  ETS 2007»
16 years 1 months ago
PPM Reduction on Embedded Memories in System on Chip
This paper summarizes advanced test patterns designed to target dynamic and time-related faults caused by new defect mechanisms in deep-submicron memory technologies. Such tests a...
Said Hamdioui, Zaid Al-Ars, Javier Jiménez,...
ARITH
2009
IEEE
16 years 1 months ago
Unified Approach to the Design of Modulo-(2n +/- 1) Adders Based on Signed-LSB Representation of Residues
Moduli of the form 2n ± 1, which greatly simplify certain arithmetic operations in residue number systems (RNS), have been of longstanding interest. A steady stream of designs fo...
Ghassem Jaberipur, Behrooz Parhami
203
Voted
FDL
2003
IEEE
15 years 12 months ago
Using Rewriting-Logic Notation for Funcional Verification in Data-Stream Based Reconfigurable Computing
Reconfigurable Systolic Arrays are a generalization of Systolic Arrays where node operations and interconnections can be redefined even at run time. This flexibility increases the...
Mauricio Ayala-Rincón, Ricardo P. Jacobi, C...