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ICCAD
2003
IEEE
127views Hardware» more  ICCAD 2003»
15 years 8 months ago
Performance Efficiency of Context-Flow System-on-Chip Platform
Recent efforts in adapting computer networks into system-on-chip (SOC), or network-on-chip, present a setback to the traditional computer systems for the lack of effective program...
Rami Beidas, Jianwen Zhu
SIGCOMM
2009
ACM
15 years 6 months ago
SmartRE: an architecture for coordinated network-wide redundancy elimination
Application-independent Redundancy Elimination (RE), or identifying and removing repeated content from network transfers, has been used with great success for improving network pe...
Ashok Anand, Vyas Sekar, Aditya Akella
ALGOSENSORS
2007
Springer
15 years 3 months ago
Efficient Sensor Network Design for Continuous Monitoring of Moving Objects
We study the problem of localizing and tracking multiple moving targets in wireless sensor networks, from a network design perspective i.e. towards estimating the least possible n...
Sotiris E. Nikoletseas, Paul G. Spirakis
LCN
2005
IEEE
15 years 5 months ago
Light-Trail Networks: Design and Survivability
The light-trail architecture provides a novel solution to address IP-centric issues at the optical layer. By incorporating drop and continue functionality, overlaid with a lightwe...
Srivatsan Balasubramanian, Wensheng He, Arun K. So...
CONPAR
1994
15 years 3 months ago
The Rewrite Rule Machine Node Architecture and Its Performance
The Rewrite Rule Machine (RRM) is a massively parallel MIMD/SIMD computer designed with the explicit purpose of supporting veryhigh-level parallel programming with rewrite rules. T...
Patrick Lincoln, José Meseguer, Livio Ricci...