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» Designing Leakage Aware Multipliers
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ISQED
2010
IEEE
151views Hardware» more  ISQED 2010»
14 years 1 months ago
Leakage temperature dependency modeling in system level analysis
Abstract— As the semiconductor technology continues its marching toward the deep sub-micron domain, the strong relation between leakage current and temperature becomes critical i...
Huang Huang, Gang Quan, Jeffrey Fan
TCAD
2008
118views more  TCAD 2008»
13 years 6 months ago
Variability-Aware Bulk-MOS Device Design
As CMOS technology is scaled down toward the nanoscale regime, drastically growing leakage currents and variations in device characteristics are becoming two important design chall...
Javid Jaffari, Mohab Anis
DAC
2004
ACM
14 years 7 months ago
Simultaneous optimization of supply and threshold voltages for low-power and high-performance circuits in the leakage dominant e
Electrothermal couplings between supply voltage, operating frequency, power dissipation and die temperature have been shown to significantly impact the energy-delay-product (EDP) ...
Anirban Basu, Sheng-Chih Lin, Vineet Wason, Amit M...
ISLPED
2006
ACM
119views Hardware» more  ISLPED 2006»
14 years 5 days ago
Process variation aware cache leakage management
In a few technology generations, limitations of fabrication processes will make accurate design time power estimates a daunting challenge. Static leakage current which comprises a...
Ke Meng, Russ Joseph
ISLPED
2005
ACM
111views Hardware» more  ISLPED 2005»
13 years 11 months ago
Peak temperature control and leakage reduction during binding in high level synthesis
Temperature is becoming a first rate design criterion in ASICs due to its negative impact on leakage power, reliability, performance, and packaging cost. Incorporating awareness o...
Rajarshi Mukherjee, Seda Ogrenci Memik, Gokhan Mem...