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PPOPP
2010
ACM
15 years 6 months ago
Load balancing on speed
To fully exploit multicore processors, applications are expected to provide a large degree of thread-level parallelism. While adequate for low core counts and their typical worklo...
Steven Hofmeyr, Costin Iancu, Filip Blagojevic
89
Voted
IPPS
1997
IEEE
15 years 3 months ago
Enhancing Software DSM for Compiler-Parallelized Applications
Current parallelizing compilers for message-passing machines only support a limited class of data-parallel applications. One method for eliminating this restriction is to combine ...
Peter J. Keleher, Chau-Wen Tseng
77
Voted
PPOPP
2010
ACM
15 years 8 months ago
Featherweight X10: a core calculus for async-finish parallelism
We present a core calculus with two of X10's key constructs for parallelism, namely async and finish. Our calculus forms a convenient basis for type systems and static analys...
Jonathan K. Lee, Jens Palsberg
ICPP
2009
IEEE
15 years 5 months ago
Speeding Up Distributed MapReduce Applications Using Hardware Accelerators
—In an attempt to increase the performance/cost ratio, large compute clusters are becoming heterogeneous at multiple levels: from asymmetric processors, to different system archi...
Yolanda Becerra, Vicenç Beltran, David Carr...
TEC
2002
119views more  TEC 2002»
14 years 10 months ago
Graph-based evolutionary design of arithmetic circuits
Abstract--In this paper, we present an efficient graph-based evolutionary optimization technique called evolutionary graph generation (EGG) and the proposed approach is applied to ...
Dingjun Chen, Takafumi Aoki, Naofumi Homma, Toshik...