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109
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ISPAN
2000
IEEE
15 years 5 months ago
Versatile Processor Design for Efficiency and High Performance
We present new architectural concepts for uniprocessor designs that conform to the data-driven computation paradigm. Usage of our D2 -CPU (Data-Driven processor) follows the natura...
Sotirios G. Ziavras
106
Voted
CANPC
1999
Springer
15 years 5 months ago
Implementing Application-Specific Cache-Coherence Protocols in Configurable Hardware
Streamlining communication is key to achieving good performance in shared-memory parallel programs. While full hardware support for cache coherence generally offers the best perfo...
David Brooks, Margaret Martonosi
99
Voted
COMSWARE
2007
IEEE
15 years 7 months ago
A Parallelization of ECDSA Resistant to Simple Power Analysis Attacks
The Elliptic Curve Digital Signature Algorithm admits a natural parallelization wherein the point multiplication step can be split in two parts and executed in parallel. Further pa...
Sarang Aravamuthan, Viswanatha Rao Thumparthy
114
Voted
SKG
2006
IEEE
15 years 6 months ago
Simulate Grid Resource Trading via Cognitive Agent: A Case Study
In this paper, we explore the market-based grid resource trading system from the social perspective and the collaborative computing perspective. We firstly introduce a novel fram...
Yuhui Qiu, Zhixing Huang
PPOPP
2005
ACM
15 years 6 months ago
Exposing speculative thread parallelism in SPEC2000
As increasing the performance of single-threaded processors becomes increasingly difficult, consumer desktop processors are moving toward multi-core designs. One way to enhance th...
Manohar K. Prabhu, Kunle Olukotun