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EUROSYS
2009
ACM
16 years 2 months ago
Orchestra: intrusion detection using parallel execution and monitoring of program variants in user-space
In a Multi-Variant Execution Environment (MVEE), several slightly different versions of the same program are executed in lockstep. While this is done, a monitor compares the behav...
Babak Salamat, Todd Jackson, Andreas Gal, Michael ...
ICCD
2005
IEEE
114views Hardware» more  ICCD 2005»
16 years 2 months ago
Memory Bank Predictors
Cache memories are commonly implemented through multiple memory banks to improve bandwidth and latency. The early knowledge of the data cache bank that an instruction will access ...
Stefan Bieschewski, Joan-Manuel Parcerisa, Antonio...
ICCD
2005
IEEE
100views Hardware» more  ICCD 2005»
16 years 2 months ago
Temporal Decomposition for Logic Optimization
Traditional approaches for sequential logic optimization include (1) explicit state-based techniques such as state minimization, (2) structural techniques such as retiming, and (3...
Nathan Kitchen, Andreas Kuehlmann
ICCD
2005
IEEE
108views Hardware» more  ICCD 2005»
16 years 2 months ago
Methods for Modeling Resource Contention on Simultaneous Multithreading Processors
Simultaneous multithreading (SMT) seeks to improve the computation throughput of a processor core by sharing primary resources such as functional units, issue bandwidth, and cache...
Tipp Moseley, Dirk Grunwald, Joshua L. Kihm, Danie...
ICCD
2001
IEEE
124views Hardware» more  ICCD 2001»
16 years 2 months ago
High-Level Power Modeling of CPLDs and FPGAs
In this paper, we present a high-level power modeling technique to estimate the power consumption of reconfigurable devices such as complex programmable logic devices (CPLDs) and ...
Li Shang, Niraj K. Jha
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