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TVLSI
2010
14 years 4 months ago
A Novel Variation-Tolerant Keeper Architecture for High-Performance Low-Power Wide Fan-In Dynamic or Gates
Dynamic gates have been excellent choice in the design of high-performance modules in modern microprocessors. The only limitation of dynamic gates is their relatively low noise mar...
Hamed F. Dadgour, Kaustav Banerjee
CORR
2011
Springer
143views Education» more  CORR 2011»
14 years 1 months ago
Towards Understanding and Harnessing the Potential of Clause Learning
Efficient implementations of DPLL with the addition of clause learning are the fastest complete Boolean satisfiability solvers and can handle many significant real-world problem...
Paul Beame, Henry A. Kautz, Ashish Sabharwal
CVPR
2011
IEEE
14 years 1 months ago
Tag Localization with Spatial Correlations and Joint Group Sparsity
Nowadays numerous social images have been emerging on the Web. How to precisely label these images is critical to image retrieval. However, traditional image-level tagging methods...
Yang Yang, Yi Yang, Zi Huang, Heng Tao Shen, Feipi...
INFOCOM
2011
IEEE
14 years 1 months ago
Throughput and delay scaling of general cognitive networks
—There has been recent interest within the networking research community to understand how performance scales in cognitive networks with overlapping n primary nodes and m seconda...
Wentao Huang, Xinbing Wang
ISCA
2011
IEEE
240views Hardware» more  ISCA 2011»
14 years 1 months ago
Virtualizing performance asymmetric multi-core systems
Performance-asymmetric multi-cores consist of heterogeneous cores, which support the same ISA, but have different computing capabilities. To maximize the throughput of asymmetric...
Youngjin Kwon, Changdae Kim, Seungryoul Maeng, Jae...
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