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» Designing a Common Communication Subsystem
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IESS
2007
Springer
120views Hardware» more  IESS 2007»
15 years 5 months ago
Error Containment in the Time-Triggered System-On-a-Chip Architecture
Abstract: The time-triggered System-on-a-Chip (SoC) architecture provides a generic multicore system platform for a family of composable and dependable giga-scale SoCs. It supports...
Roman Obermaisser, Hermann Kopetz, Christian El Sa...
SBCCI
2005
ACM
276views VLSI» more  SBCCI 2005»
15 years 4 months ago
Virtual channels in networks on chip: implementation and evaluation on hermes NoC
Networks on chip (NoCs) draw on concepts inherited from distributed systems and computer networks subject areas to interconnect IP cores in a structured and scalable way. Congesti...
Aline Mello, Leonel Tedesco, Ney Calazans, Fernand...
CLOUD
2010
ACM
15 years 4 months ago
Differential virtual time (DVT): rethinking I/O service differentiation for virtual machines
This paper investigates what it entails to provide I/O service differentiation and performance isolation for virtual machines on individual multicore nodes in cloud platforms. Sh...
Mukil Kesavan, Ada Gavrilovska, Karsten Schwan
ISCA
2008
IEEE
201views Hardware» more  ISCA 2008»
14 years 11 months ago
iDEAL: Inter-router Dual-Function Energy and Area-Efficient Links for Network-on-Chip (NoC) Architectures
Network-on-Chip (NoC) architectures have been adopted by a growing number of multi-core designs as a flexible and scalable solution to the increasing wire delay constraints in the...
Avinash Karanth Kodi, Ashwini Sarathy, Ahmed Louri
COMPSAC
2002
IEEE
15 years 4 months ago
Design and Implementation of a Network Application Architecture for Thin Clients
This paper explores the issues and the techniques of enabling multimedia applications for the thin client computing. A prototype of a video communication system based on H.323 fam...
Chia-Chen Kuo, Ping Ting, Ming-Syan Chen, Jeng-Chu...