377 search results - page 14 / 76 » Designing a DHT for Low Latency and High Throughput |
ISLPED
2009
ACM
15 years 4 months ago
2009
ACM
On-chip communication, including short, often-multicast, latency-critical coherence and synchronization messages, and long, unicast, throughput-sensitive data transfer, limits the...
DATE
2009
IEEE
15 years 4 months ago
2009
IEEE
- Parallel architectures have become an increasingly popular method in which to achieve high performance with low power consumption. In order to leverage these benefits, applicatio...
NOCS
2010
IEEE
14 years 7 months ago
2010
IEEE
The number of cores present on-chip is increasing rapidly. The on-chip network that connects these cores needs to scale efficiently. The topology of on-chip networks is an importan...
ACSC
2006
IEEE
15 years 3 months ago
2006
IEEE
The performance of an interconnection network is measured by two metrics: average latency and peak network throughput. Network throughput is the total number of packets delivered ...
USENIX
1994
14 years 11 months ago
1994
Despite impressive advances in file system throughput resulting from technologies such as high-bandwidth networks and disk arrays, file system latency has not improved and in many...