377 search results - page 45 / 76 » Designing a DHT for Low Latency and High Throughput |
ICCAD
2008
IEEE
15 years 6 months ago
2008
IEEE
—To overcome the energy-efficiency limitations imposed by finite sub-threshold slope in CMOS transistors, this paper explores the design of integrated circuits based on nanoelect...
DATE
2008
IEEE
15 years 4 months ago
2008
IEEE
Modern digital signal processing applications have an increasing demand for computational power while needing to preserve low power dissipation and high flexibility. For many appl...
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Voted
ICC
2008
IEEE
15 years 4 months ago
2008
IEEE
— In this paper, we study the issue of scalable video streaming over IEEE 802.11e EDCA WLANs. Our basic idea is to control the number of “active” nodes on the channel in orde...
ISLPED
1995
ACM
15 years 1 months ago
1995
ACM
We argue that the clocked-CMOS (C2MOS) circuit family provides a very high throughput and low power alternative to other existing circuit techniques for the fast developing market...
HOTI
2008
IEEE
15 years 4 months ago
2008
IEEE
Much of high performance technical computing has moved from shared memory architectures to message based cluster systems. The development and wide adoption of the MPI parallel pro...