377 search results - page 50 / 76 » Designing a DHT for Low Latency and High Throughput |
89
Voted
MICRO
2006
IEEE
15 years 3 months ago
2006
IEEE
We introduce virtually-pipelined memory, an architectural technique that efficiently supports high-bandwidth, uniform latency memory accesses, and high-confidence throughput eve...
HPCA
2005
IEEE
15 years 3 months ago
2005
IEEE
Future high-performance billion-transistor processors are likely to employ partitioned architectures to achieve high clock speeds, high parallelism, low design complexity, and low...
CLUSTER
2006
IEEE
15 years 3 months ago
2006
IEEE
IP routers are now increasingly expected to do more than just traditional packet forwarding – they must be extensible as well as scalable. It is a challenge to design a router a...
82
Voted
RTAS
2006
IEEE
15 years 3 months ago
2006
IEEE
The rapid need for high bandwidth and low latency communication in distributed real-time systems is driving system architects towards high-speed switches developed for high volume...
109
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EJWCN
2010
14 years 4 months ago
2010
With the increasing popularity of wireless mesh networks (WMNs), the demand for multimedia services encompassing VoIP, multimedia streaming and interactive gaming is increasing rap...