377 search results - page 53 / 76 » Designing a DHT for Low Latency and High Throughput |
85
Voted
ISCA
2010
IEEE
15 years 2 months ago
2010
IEEE
In computer architecture, caches have primarily been viewed as a means to hide memory latency from the CPU. Cache policies have focused on anticipating the CPU’s data needs, and...
MICRO
2009
IEEE
15 years 4 months ago
2009
IEEE
Performance and power are the first order design metrics for Network-on-Chips (NoCs) that have become the de-facto standard in providing scalable communication backbones for mult...
BROADNETS
2005
IEEE
15 years 3 months ago
2005
IEEE
Multicast enables efficient data transmission from one source to multiple destinations, and has been playing an important role in Internet multimedia applications. Although sever...
ICMCS
2009
IEEE
14 years 7 months ago
2009
IEEE
Peer-to-peer content distribution provides high network throughput with relatively low server cost and scales better than traditional content distribution networks with respect to...
WDAG
2010
Springer
14 years 8 months ago
2010
Springer
In a synchronous queue, producers and consumers handshake to exchange data. Recently, new scalable unfair synchronous queues were added to the Java JDK 6.0 to support high performa...