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ASPDAC
2009
ACM
135views Hardware» more  ASPDAC 2009»
15 years 10 months ago
Analysis of communication delay bounds for network on chips
—In network-on-chip, computing worst-case delay bound for packet delivery is crucial for designing predictable systems but yet an intractable problem due to complicated resource ...
Yue Qian, Zhonghai Lu, Wenhua Dou
DATE
2008
IEEE
77views Hardware» more  DATE 2008»
15 years 10 months ago
Re-Examining the Use of Network-on-Chip as Test Access Mechanism
Existing work on testing NoC-based systems advocates to reuse the on-chip network itself as test access mechanism (TAM) to transport test data to/from embedded cores. While this m...
Feng Yuan, Lin Huang, Qiang Xu
133
Voted
GLOBECOM
2007
IEEE
15 years 10 months ago
A 10-Gbps High-Speed Single-Chip Network Intrusion Detection and Prevention System
Abstract—Network Intrusion Detection and Prevention Systems (NIDPSs) are vital in the fight against network intrusions. NIDPSs search for certain malicious content in network tr...
N. Sertac Artan, Rajdip Ghosh, Yanchuan Guo, H. Jo...
ISCAS
2007
IEEE
96views Hardware» more  ISCAS 2007»
15 years 10 months ago
Leakage-based On-Chip Thermal Sensor for CMOS Technology
Abstract— Thermal characterization of ICs and on-chip temperature monitoring has become a key task in electronic engineering. In this paper, we present the design of an on-chip C...
Pablo Ituero, José L. Ayala, Marisa L&oacut...
DAC
2006
ACM
15 years 9 months ago
DyXY: a proximity congestion-aware deadlock-free dynamic routing method for network on chip
A novel routing algorithm, namely dynamic XY (DyXY) routing, is proposed for NoCs to provide adaptive routing and ensure deadlock-free and livelock-free routing at the same time. ...
Ming Li, Qing-An Zeng, Wen-Ben Jone